| 摘要 |
A phase detector for a phase locked loop (PLL) to be employed in a wideband synthesizer generates a ramp waveform at an output. The ramp waveform has a positive slope during the reference signal; when a sample pulse is received by the circuitry, the slope of the ramp is changed to a negative slope. Hence, the output of the detector will be negative or positive depending upon the difference in phase between the reference and sample frequencies. The ramp voltage is sampled and held by a suitable circuit which provides an error signal for controlling a VCO.
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