发明名称 HYBRID INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To reduce the number of layers of an insulating board for cutting down the manufacturing cost by a method wherein pads provided on first and the second semiconductor chips correspond to one another and are arranged symmetrically, and they are connected by pattern wirings and metallic fine wires formed on the insulating board. CONSTITUTION:The first and the second semiconductor chips 2A, 2B provided with respective pads 21A-24A, 21B-24B which correspond to one another and are arranged symmetrically are mounted on an insulating board 1 while multiple pattern wirings 3 and multiple metallic fine wires 4 respectively connecting the corresponding pads 21A-24A, 21B-24B are provided. Consequently, the pattern wirings 3 and the metallic fine wires 4 are not intersected with one another thereby enabling the pattern wiring 3 to be formed in the same layer on the insulating board 1. Through these procedures, the layer numbers of the insulating substrate 1 can be reduced thereby cutting down the manufacturing cost.
申请公布号 JPH02125653(A) 申请公布日期 1990.05.14
申请号 JP19880279856 申请日期 1988.11.04
申请人 NEC CORP 发明人 NITTA HIDETO
分类号 H05K1/18;H01L23/52;H01L25/04;H01L25/18 主分类号 H05K1/18
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