| 摘要 |
PURPOSE:To transmit a carry signal at a high speed by providing a carry signal logic part which is operated by G and P signals sent from a GP generating circuit. CONSTITUTION:An adder 26 is formed which sends addition values S0 and S1 and a signal indicating carry transmission or non-transmission in accordance with the two-bit signal supplied to the GP generating circuit. An adder 27, to which an inverted carry signal sent from an inverted carry signal output terminal 25 is supplied through an inverted carry signal input terminal 28 and from which the carry signal is sent through a carry signal output terminal 29, is connected to the next stage of the adder 26. The adder 27 have the same circuit constitution as the adder 26 except a carry signal logic circuit 60 to which G and P signals sent from the GP generating circuit are supplied. This carry signal logic circuit part 60 uses G and P signals sent from the GP generating circuit to minimize the number of used transistors. Thus, the carry signal is transmitted at a high speed. |
