| 摘要 |
PURPOSE:To extract a leading signal whose low level is extended for a prescribed time from a leading signal output circuit by providing a circuit using an external selection signal so as to select an output of n-set of delay sections receiving a signal being at a low level for a prescribed time and extending a low level for an optional time. CONSTITUTION:A leading signal detection section 1 outputs a signal being at a low level for a prescribed time at the signal leading. n-set of delay sections 2-1-2-n receive a signal from the signal leading section 1 and output n-set of signals whose low level is extended for a time corresponding to a delay time set by each delay section. Furthermore, a signal 5 without delay is extracted. A selection section 3 receives (n+1) sets of signals at its inputs 1N-1-1N-0, any of the (n+1) sets of signals is selected by a selection signal at a SEL terminal 4 and the result is outputted to a signal output 7 from an output OUT. |
