SLEEP MODE CIRCUIT FOR PERSONAL COMPUTER

摘要

PURPOSE:To reduce power consumption by providing the title circuit with a sleep signal generating circuit, a latch circuit and a synchronous control circuit, and suspending clock inputted to a CPU during the idle state of the CPU. CONSTITUTION:The CPU 10 receives a HOLD signal 11, executes holding processing and outputs an HLDA signal 15 to allow the latch circuit 101 to latch a previously set sleep signal 100a by the signal 15. Then, the synchronous control circuit 102 outputs the sleep signal as a control signal 102a for a gate circuit 103 in synchronism with a processor clock 13. Even when the sleep signal generating circuit 100 has set up a sleep mode at an optional time, transfer to the sleep mode does not prevent the CPU 10 from executing the holding processing. Consequent, a clock in the CPU 10 can be suspended during the idle state of the CPU 10 and the power saving of the personal computer can be attained.