发明名称 |
Method of fabricating a self aligned semiconductor device |
摘要 |
A method of producing a semiconductor device, such as a MESFET having a self-aligned gate. A triple layer film is formed on the semiconductor substrate. The lowermost layer is a high melting point metal silicide, the intermediate layer a thin high melting point metal and the upper layer an insulator. The thicknesses and etching rates of the layers are selected such that the thin intermediate metal layer protects the underlying silicide and overlying insulator layers during etching. The three layers are anisotropically etched to produce a well-formed gate structure which is used as a mask in an ion implantation step for forming source and drain regions. A subsequent selective etching process removes the insulator layer (which serves as a dummy gate) exposing the underlying silicide layer on which is deposited a low resistance metal such as gold in a self-aligned fashion thereby to improve the high frequency performance of the device.
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申请公布号 |
US4923823(A) |
申请公布日期 |
1990.05.08 |
申请号 |
US19880248429 |
申请日期 |
1988.09.23 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
KOHNO, YASUTAKA |
分类号 |
H01L21/302;H01L21/28;H01L21/3065;H01L21/338;H01L29/47;H01L29/812;H01L29/872 |
主分类号 |
H01L21/302 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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