| 摘要 |
The circuit includes a first and a second high frequency buffers (10,20) having high input impedance for transmitting high frequency imput video signal with no phase difference and no distortion, a first low pass filter (12) for passing the horizontal synchronous signal and for blocking high frequency information signal, a first drive circuit (20) driven by output signal of a second comparator (18) for modulating digital information siggnal into a pulse with a certain level, a second driving circuit (38) driven by a certain AC level of fourth comparator (36) for regenerating a synchronous clock pulse, and a second low pass filter (42) for passing the houizontal synchronous signal of the synthesized video signal.
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