| 摘要 |
A well is formed in a semiconductor substrate. The first capacitor is connected between the terminal to which the first clock signal is supplied and the first node. The second capacitor is connected between the terminal to which the second clock signal, which has an opposite phase to the first signal, is supplied and the second node. The first to fourth transistors are formed in the well. For the first transistor, a current path is connected between the substrate and the first node and its gate is connected to the first node. For the second transistor, a current path is connected between the substrate and the second node and its gate is connected to the second node.
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