发明名称 GATE CIRCUIT FOR ULTRASONIC FLAW DETECTOR
摘要 PURPOSE:To detect a size and a position of a defect of an object to be inspected accurately by detecting a maximum of an echo signal within a desired time range and latching an output value of an address counter as the maximum is generated. CONSTITUTION:With the radiation of an ultrasonic wave from a probe 2 by a pulse of a transmitting section 3, an echo signal is converted into digital from analog and a data is outputted to a waveform memory 6 and a gate circuit 21. The memory 6 stores a data and counts addresses sequentially. The circuit 21 latches the data and when a gate timing signal is outputted, it detects a maximum among the data latched to latch it together with the current address counts. Then, the maximum within a specified time range and the current address counts are detected to be supplied to a CPU 10. This enables the learning of a size and a position of a defect or the like of an object to be inspected accurately.
申请公布号 JPH02116746(A) 申请公布日期 1990.05.01
申请号 JP19880269381 申请日期 1988.10.27
申请人 HITACHI CONSTR MACH CO LTD 发明人 TANAKA YASUO;IZUMI EIKI;AOKI SHIGENORI
分类号 G01N29/38;G01N29/22;G01N29/44 主分类号 G01N29/38
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