发明名称 CHROMINANCE SIGNAL PROCESSING CIRCUIT FOR VIDEO TAPE RECORDER
摘要 PURPOSE:To use an AFC circuit in common for the NTSC and the PAL systems by controlling a VCO so as to obtain a horizontal synchronizing frequency at a frequency division circuit output at all times even if a frequency division circuit is changed over. CONSTITUTION:An AFC circuit consists of the 1st frequency division circuit 37 comprising a 1/2 frequency division circuit 38 and a 1/4 frequency division circuit 39, and 2nd frequency division circuit 37 having the frequency dividing ratio of at least, either one of 1/3, 1/5 or 1/7, and the 3rd frequency division circuit 41 which can change over the frequency dividing ratio for the NTSC and the PAL systems. A control voltage generating circuit 25, a VCO26, and frequency division circuits 40, 41 form a PLL circuit. The frequency dividing ratio of the circuit 41 is switched with the NTSC and the PAL systems, allowing to obtain a signal with different frequency for the system at the output of the VCO26. The output of the VCO26 is given to a converter via the frequency division circuit 27 and a phase selection circuit 34.
申请公布号 JPS5877390(A) 申请公布日期 1983.05.10
申请号 JP19810175677 申请日期 1981.11.04
申请人 HITACHI SEISAKUSHO KK 发明人 KOJIMA NOBORU;AZEYANAGI TOMOMITSU;SHIBATA AKIRA
分类号 G11B20/02;H04N9/79;H04N9/80;H04N9/83;H04N9/84 主分类号 G11B20/02
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