| 摘要 |
The controller in which the number of counted pulses of notch instruction voltage can be corrected by motor program includes a comparator (11) transmitting the high level signal through a terminal (O0) and low level signals through terminals (O1-O7) when the notch instruction is received, an inverter (12) inverting the output signal of the comparator by receiving a low level signal from an OR gate (OR1), a decoder (16) enabling I/O port (15) by transmitting the chip selecting signal (CS2), a NOR gate (NOR1) loading counters (17,18) by receiving a write signal (WR) from CPU, and an I/O port (15) decreasing the notch instruction voltage step by step.
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