发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To obtain a monitor circuit with which threshold voltages of field- effect transistors MOS-FET by a method wherein predetermined currents are applied to the respective MOS-FET's through first and second pads and the potentials of the respective pads are measured. CONSTITUTION:In a monitor circuit for an N-type channel MOS-FET, the drain and gate of an N-type channel transistor Tn are short-circulated with each other and connected to a pad P1 and the source and back-gate of the transistor Tn are connected to the lowest potential (each potential) part Sub in a substrate. At the time of testing, a tester TE having a constant current source 1 is connected between the pad P1 and the lowest potential part Sub and a predetermined current is applied to the transistor Tn to facilitate the test of the threshold voltage of the MOS-FET. Further, the drain and gate of a p-type channel transistor Tp are short-circuited with each other and connected to a pad P2 and the highest potential VDD in the substrate is applied to the source and back-gate of the transistor Tp. At the time of testing, the tester TE having the constant current source 1 is connected between the pad P2 and the highest potential VDD to facilitate the test of the threshold voltage.
申请公布号 JPH02116140(A) 申请公布日期 1990.04.27
申请号 JP19880268296 申请日期 1988.10.26
申请人 FUJITSU LTD 发明人 TSUCHIYA CHIKARA;YOSHIDA YUJI
分类号 G01R31/26;H01L21/66 主分类号 G01R31/26
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