发明名称 MULTILAYER THICK FILM HYBRID INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To realize high density packaging by burying a dielectric in a hole which is provided to interconnect each pattern to an insulating layer between an upper layer wiring pattern and a lower layer wiring pattern. CONSTITUTION:A hole 5 having an arbitrary hole sectional area S and a thickness (d) is formed in an insulator 3. A paste-form dielectric 6 having an arbitrary dielectric constant is buried in the hole 5 and brought into contact with a lower layer pattern 4; at the same time, an upper layer wiring pattern 2 is formed to come into contact with the dielectric 6. The pattern 4 is thereby connected to the pattern 2 by the dielectric 6. A capacity of a capacitor is determined by a thickness (d) of the insulator 3, a sectional area S of the hole 5 and a dielectric constant of the dielectric 6. Since the ratio occupied by a chip capacitor is thereby reduced as compared with a conventional one, higher density packaging is realized.</p>
申请公布号 JPH02116195(A) 申请公布日期 1990.04.27
申请号 JP19880269916 申请日期 1988.10.26
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KAMEOKA FUSAHIRO;KOYAMA FUMIO
分类号 H05K1/16;H05K3/46 主分类号 H05K1/16
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