| 摘要 |
PURPOSE:To sharply reduce the number of hardwares and to attain rapid arithmetic processing by limiting a device to be applied to operation only to a three- input adder. CONSTITUTION:A multiplier is provided with a rewritable partial product storing storage device 1 with n(>4)-bit length, a rewritable multiplicand storing storage device 2 with n-bit length to be shifted in each 4 bits, a multiplicand storing storage device 3 with n-bit length, a multiple selection control device 4 for decoding the least significant 4-bit output from the storage device 2 and outputting a control signal selecting the multiple of a multiplicand, a multiple formation selecting device 5 for shifting the value of a multiplicand outputted from the storage device 3 to form the multiple of the multiplicand and selecting two multiples out of the multiples of the multiplicands in accordance with a control signal outputted from the device 4, and the three-input adder 6 with (n+4)-bit length for adding the output of the storage 1 to that of the device 5 and outputting and storing the added result to/in the storage devices 1, 2. Thus, operation can be rapidly executed. |
