| 摘要 |
PURPOSE:To improve duty deterioration at the time of distributing a clock by dropping the frequencies of a clock signal at frequencies f0 and a frame signal synchronized with the clock signal to 1/n, extracting the clock signal at frequencies f0 on a receiving side, and detecting the frame signal with the use of a regenerative clock signal. CONSTITUTION:A divider 15 to divide the clock at the frequencies f0 by 1/n, and a frame superimposing circuit to superimpose the frame signal on the clock signal at frequencies f0/n are are provided at a clock transmitter 11. A clock extracting circuit 18 to extract the regenerative clock signal at the frequencies f0 out of the inputted frame superimposing clock signal at the frequencies f0/n, and a frame extracting circuit 19 to detect the superimposed frame signal are provided at a clock receiver 12. Thus, since the clock signal to be distributed at the frequencies f0 can be transmitted based on the divided frequencies f0/n, the clock signals can be distributed without trouble even when the clock frequencies are made higher. |
