| 摘要 |
PURPOSE:To increase a coding gain by obtaining a redundant bit required for coding through increase in a transmission speed without increasing a modulation signal point. CONSTITUTION:The title circuit consists of a speed conversion circuit 1, a coding circuit 2, an arrangement circuit 3 to signal space, a modulation circuit 4, a demodulation circuit 5, a decoding circuit 6, a speed conversion circuit 7, clock speed conversion circuits 8, 9 and a clock recovery circuit 10. Then the increase in the required transmission speed due to the redundant bit added through the coding is compensated not by the increase in the multi-value number but by the transmission speed. Thus, a large coding gain is obtained. |
