| 摘要 |
PURPOSE:To reduce the quantity of hardware of an auxiliary diagnosing circuit without lowering the diagnosing performance, by enabling the diagnosis of a logical circuit containing an FF which is incapable of scan-in/scan-out. CONSTITUTION:Test data is scanned into an FF10 which is capable of scan-in/ scan-out. Then a system clock Cj is supplied to an FF12 which is incapable of scan-in/scan-out, and the output state of a combined circuit 11 is fetched to the FF12. A system clock Ci is supplied to an FF14 which is capable of scan-in/ scan-out, and the output state of a combined circuit 13 is fetched to the FF14. Finally the FF14 is scanned out. The scan-out data delivered to a scan-out data SOD line 5 is compared with the expected value obtained previously. Then the normal or abnormal state is decided for a logical circuit including the circuits 11 and 13 and the FF12. If the logical circuit is abnormal, the abnormal state is decided. This operation enables the diagnosis even for an FF which is incapable of scan-in/scan-out. |
