| 摘要 |
PURPOSE:To diminish the pn junction capacity between a source region, a drain region and a substrate for accelerating the data reading-out rate (access time) by a method wherein the memory cells storing different data are composed of different depression type threshold value voltages. CONSTITUTION:In a vertical mask ROM, a memory cell NDD storing '0' data is composed of a depression type threshold value voltage while another memory cell MD storing '1' data is composed of another different depression type threshold value voltage from that of the memory cell MDD. Consequently, the memory M especially the memory cell MD storing the '1' data diminishes the led-in amount of p type impurity 15P for writing-in data further to diminish the pn junction capacity between the source region, drain region of a MOSFET and a p<->type well region (substrate)3. Through these procedures, the data reading-out rate (access time) can be accelerated. |
