发明名称 CACHE
摘要 PURPOSE:To make the write suppressed time of a tag memory shorter so as to reduce the test time of the tag memory by setting counter for replacement to a disabled state when the tag memory is tested. CONSTITUTION:When a set address is inputted from an address pin 16 after designating a tag address and tag buffer 7 for rewriting the tag buffer 7, discordance occurs in a comparator 19 and a comparison miss signal is inputted to a replacement gate 21. Then the tag address is stored in the tag buffer 7. Simultaneously, a signal which indicates the execution of a test is inputted to a test pin 23. Therefore, a counter 15 is set to a disabled state and no trigger is issued to an address output circuit 13. As a result, a cache does not make access to a main memory for data. Therefore, the rewriting time and, accordingly, testing time of the tag buffer can be reduced, since the rewriting of the tag buffer is completed at the point of time.
申请公布号 JPH02112040(A) 申请公布日期 1990.04.24
申请号 JP19880266484 申请日期 1988.10.21
申请人 MITSUBISHI ELECTRIC CORP 发明人 TANIGAWA TOSHIYUKI
分类号 G06F12/08;G06F11/22 主分类号 G06F12/08
代理机构 代理人
主权项
地址