| 摘要 |
PURPOSE:To assure the title device with stable and low IDDS characteristic by providing one or more of grounded conductor layers through an insulating film insulating film under a high resistance polycrystalline silicon resistor. CONSTITUTION:MOSFETs Q1-Q4, a word line, WL, and a ground line SL are formed, on which an interlayer insulating film 12 is formed, and thereafter a polycrystalline silicon film 18 is formed. With diffusion of an impurity, the polycrystalline silicon 18 is made conductive. Then, it is patterned into a given shape, over the entire surface of which an interlayer insulating film 14 is formed and a contact hole 19 is formed. Further, a thin intrinsic polycrystalline silicon film 20 is formed on the interlayer insulating film 14. Then, a resist mask layer is provided at a portion of the intrinsic polycrystalline silicon film 20 corresponding to a high resistance polycrystalline silicon resistor of the same, and with diffusion of phosphorus and ion-implantation the polycrystalline silicon film not covered with the resist mask layer is given low resistance. Further, after removal of the resist mask layer, the polycrystalline silicon layer 20 is patterned into a given shape to form a wiring layer 15 and high resistance polycrystalline silicon resistors R1, R2. Further, an interlayer insulating film 17, a contact hole 21, and data lines DL, DL' are formed. Hereby, IDDS is stably reduced and made fine. |
