| 摘要 |
<p>PURPOSE:To make a data processor high in performance by providing a measuring means to measure the delay time of a logic circuit, and changing the operating system of the logic circuit when the delay time exceeds the range of some definite value. CONSTITUTION:A clock signal outputted from a clock signal generation circuit 1 is supplied to the logic circuit 5 through a clock signal line 6, and simultaneously, is inputted to a comparator 4. The delay time of the logic circuit 5 is measured by a ring oscillator 2, and the output of the ring oscillator 2 is connected to the input of another side of the comparator 4 through a frequency division circuit 3. Thus, the delay time of the logic circuit 5 and a clock signal period are compared in the comparator 4, and when the delay time is late, an operating system instruction signal 7 is outputted to the logic circuit 5. Thus, since the operating system optimum to the delay time of the logic circuit can be selected dynamically, the performance of the logic circuit can be improved.</p> |
