发明名称
摘要 <p>Process for preparing multilayer printed circuits comprising laminating simultaneously or sequentially to a substrate bearing a circuit pattern two photopolymerizable layers, the lower layer formulated for bulk response as defined and the upper layer formulated for surface response as defined; exposing the laminate to actinic radiation through a circuit image related to the circuit pattern on the substrate; embedding finely divided metal, e.g., copper, to the tacky image areas; exposing the toned laminate to actinic radiation through an image of at least one overlying segment of the conductive circuit pattern; removing unexposed photopolymer from the two layers to form vias; embedding finely divided metal, e.g., copper, or catalyst to the side walls of the vias; optionally, curing the image by exposing to actinic radiation and/or by heating; plating to form an interconnected electrically conductive circuit. Additional circuit layers can be added by repeating the process using the newly plated circuit pattern as a substrate.</p>
申请公布号 JPH0217355(B2) 申请公布日期 1990.04.20
申请号 JP19850237783 申请日期 1985.10.25
申请人 II AI DEYUHON DE NIMOASU ANDO CO 发明人 ROKUSHII NII FUAN
分类号 B05D3/06;B32B15/08;B32B37/00;B32B43/00;H05K3/00;H05K3/10;H05K3/18;H05K3/24;H05K3/40;H05K3/46 主分类号 B05D3/06
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