发明名称 |
Semiconductor memory device having a serial access memory. |
摘要 |
<p>A semiconductor memory device includes a RAM (40) and a serial access memory (SAM) (41). The SAM includes an address counter which generates a slave address (SAD) and a master address (MAD). The slave address precedes the master address by half the period of a serial access strobe signal (SAS). A redundancy decision is made by comparing the slave address with a redundancy address. When the master address is supplied to a data register provided in the SAM, the decision result is available. That is, the SAM can be accessed immediately after the master address is supplied thereto.</p> |
申请公布号 |
EP0364110(A2) |
申请公布日期 |
1990.04.18 |
申请号 |
EP19890309443 |
申请日期 |
1989.09.18 |
申请人 |
FUJITSU LIMITED;FUJITSU VLSI LIMITED |
发明人 |
OGAWA, HIROAKI;NOGUCHI, MASAAKI |
分类号 |
G11C11/413;G11C7/10;G11C29/00;G11C29/04 |
主分类号 |
G11C11/413 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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