发明名称 ADDRESS SELECTING CIRCUIT
摘要 PURPOSE:To perform address selection easily even when the memory constituting number of process input and output blocks or memory cards does not coincide with the basic number of addresses, by subtracting a starting address from the address signal of an address bus. CONSTITUTION:For address selection when the constituting number of input and output blocks 13a-13e of a process input and output card or memories of a memory card does not coincide with the basic number of addresses, subtracters 5a and 5b which subtract set starting address signals 2a and 2b from address signals 1a and 1b of a switch and an address bus for setting the starting address of the process input and output card, and a decoder 10 which operates the blocks 13a-13e or memories on the basis of outputs of the subtracters are provided. According to the differences between the signals 1a and 1b, and the signals 2a and 2b, whether the card is accessed or not, and what number of input and output block of the card is accessed are discriminated.
申请公布号 JPS5883376(A) 申请公布日期 1983.05.19
申请号 JP19810182534 申请日期 1981.11.12
申请人 MITSUBISHI DENKI KK 发明人 HATANAKA YASUMUTSU
分类号 G06F12/06;G11C8/12 主分类号 G06F12/06
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