| 摘要 |
<p>1. A device for detecting the functionning of the read mode in integral circuits of the logic circuit type comprising a nonvolatile memory with the data contained therein, the memory being constituted by a matrix of MOS transistor memory-cells adapted to present defined threshold voltages VT0 and VT1 in accordance with their programming in terms of logic stade "0" or "1", said memory-cells being read out by way of applying a reading voltage VL thereto, such that VT0 < VL < VT1 in normal operation, characterized in that the detection device (A) is constituted by an inverter comprising : - an enhancement MOS-type signal transistor (10) having a threshold voltage VT such that VL < VT < VT1 , and whose gate (14) is connected to the reading voltage, and - a load (11) connected to the reading voltage, the inverter providing a logic signal S used to notify the integrated circuit that the reading voltage exceeds the threshold voltage VT .</p> |
