发明名称 INPUT AND OUTPUT CONTROLLING SYSTEM
摘要 PURPOSE:To facilitate program control, to reduce program capacity, and to prevent an overrun, by providing a specific interruption level and controlling it by programs with other interruption levels. CONSTITUTION:A microprocessor 1 has interruption levels. In a memory space 2, an interface area 7, FPD (floppy disk) controlling program 8, display controlling program 9, printer controlling program 10, ending processing program 11, and other various programs 12 are stored. In an IO space 3, an FPD controlling register group 13, display controlling register 14, printer controlling register group 15, and flip-flop 16 controllable by a program are stored. The flip-flop 16 is set by interruption processing programs with other interruption levels.
申请公布号 JPS5886645(A) 申请公布日期 1983.05.24
申请号 JP19810185733 申请日期 1981.11.18
申请人 USAC DENSHI KOGYO KK 发明人 NISHIMOTO HISASHI;TSUJI MASANOBU
分类号 G06F13/24;G06F9/48 主分类号 G06F13/24
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