| 摘要 |
PURPOSE:To process an instruction at high speed by providing a comparator to detect the coincidence of the physical addresses of plural memory operands, and controlling an instruction execution operation by the output of the comparator. CONSTITUTION:An instruction execution means 10 opens a selector 2 to an AS1 side first, and after finding a logical address from the AS1 by an address generating means 3, performs address conversion by an address conversion means 4, and sets an obtained physical address PA1 on an address register 5. Next, the means opens the selector 2 to an AS2 side, and finds the physical address PA2 from the AS2 similarly, then, sets it on an address register 6. And a test whether or not the PA1 coincides with the PA2 is performed by the output of the comparator 7 which compares the output of the physical address register 5 with that of the register 6. When noncoincidence is obtained, a migrating operation is performed as issuing a command to a selector 8 and an operand storage means 9, and when the PA1 coincides with the PA2, a processing is completed doing nothing. In such a way, it is possible to complete the instruction at high speed. |
