发明名称 |
Signal level transforming circuit |
摘要 |
A signal level transforming circuit includes a constant current circuit for supplying a constant current corresponding to a power voltage of an input signal to an electrical line connected between an output terminal connected with an input terminal via an input resistor and a common voltage level terminal, a low level clamping circuit for clamping the minimum value of the voltage at the output terminal to a first low level voltage, a voltage generating circuit for generating a constant voltage so as to transform a voltage signal in the input terminal into a binary signal, and a comparing circuit having a hysteresis characteristic and including a multi-collector type transistor having one collector connected with a voltage output terminal in the voltage generating circuit via a resistor for setting a comparing voltage, and having another collector connected to the output terminal, and a transistor inserted between a base of the multi-collector type transistor and the resistor for setting a comparing voltage and for turning ON when the voltage at the input terminal exceeds the voltage in the resistor.
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申请公布号 |
US4916330(A) |
申请公布日期 |
1990.04.10 |
申请号 |
US19880249157 |
申请日期 |
1988.09.26 |
申请人 |
AISIN SEIKI KABUSHIKI KAISHA |
发明人 |
HATAKEYAMA, AKIRA;NAKANE, TAKESHI |
分类号 |
H03K3/0233;H03K3/2893;H03K5/02;H03K5/08;H03K19/018 |
主分类号 |
H03K3/0233 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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