发明名称 PULSE COUNT CIRCUIT
摘要 PURPOSE:To handle high speed pulse train not requiring circuits of large number of digits exclusively, by constituting the count circuit with a section to obtain the difference of pulse number and a section counting the difference of the pulse number. CONSTITUTION:A pulse train (a) to be measured is outputted 4, 5 with a pulse train (c) delaying 15 a reference pulse train (b) and the pulse train (b) itself of detect 6, 7 the state. The detected signals (f), (g) hold 9, 10 for one period of the reference pulse train (c) to detect 12, 13 the change in the relation of phase from the detection signals (i), (k) before one period and when the phase of the reference pulse train (b) is increased for a prescribed amount to the pulse train (a) to be measured, the count value is incremented (m) by one, and conversely when the phase is decreased by a prescribed amount, the count value is decremented (l) by one. A circuit having large digit number is an up-down counter 14 only, allowing to make this count circuit suitable for high speed operation.
申请公布号 JPS5887919(A) 申请公布日期 1983.05.25
申请号 JP19810185630 申请日期 1981.11.19
申请人 NIPPON DENKI KK 发明人 OOGUSHI YOSHIO
分类号 H03K23/00;H03K5/26;H03K21/00 主分类号 H03K23/00
代理机构 代理人
主权项
地址