发明名称 PARABOLA WAVEFORM GENERATING CIRCUIT
摘要 PURPOSE:To correspond automatically to the change of a vertical frequency by processing a subtraction by a subtracting circuit for which an operational amplifier is used based on two signal voltages from both ends of a vertical S-shape capacitor. CONSTITUTION:The difference of the signal voltages from both ends of a vertical S-shape capacitor C1 of a vertical deflection output circuit 1 is calculated and processed by a subtracting circuit 3 utilized with an operational amplifier 2 (differential amplifying circuit) which is an integrated circuit and a parabola waveform is generated. That is to say, the + terminal of the vertical S-shape capacitor C1 is connected to the non-inversion input terminal (+ terminal) of the operational amplifier 2 through a capacitor 2 and a resistance R2 in series, the + terminal is grounded through a resistance R3, the - terminal of the vertical S-shape capacitor C1 is connected to the inversion input terminal (- terminal) of the operational amplifier 2 through a capacitor 3 and a resistance R4 in series, a resistance R5 is connected between this terminal and the output terminal of the operational amplifier 2, one of the B voltage connecting end of the operational amplifier 2 is connected to a + power source, the other is connected to a - power source, to constitute a parabola waveform generating circuit. Thus, a parabola waveform with little distortion can be easily obtained and the circuit can corresponds to the change of the vertical frequency without changing its constant.
申请公布号 JPH0294964(A) 申请公布日期 1990.04.05
申请号 JP19880246574 申请日期 1988.09.30
申请人 FUJITSU GENERAL LTD 发明人 KANETANI ATSUSHI
分类号 H04N3/23;G09G1/04;G09G1/16 主分类号 H04N3/23
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