发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To enhance a pattern recognition rate by a method wherein a spare groove down to a depth required for an element is formed by an etching operation simultaneously with an element formation region, a part other than the spare groove in an automatic alignment pattern part is masked and only an automatic alignment pattern is etched additionally down to a prescribed depth. CONSTITUTION:The surface of a GaAs substrate 1 is coated with a first photoresist layer 2 by using a spinner; after that, a prescribed opening part 4 for recess use and an opening part 3 for alignment pattern use are formed in the photoresist layer 2; this assembly is etched by using a phosphoric acid- based etching liquid; a recessed groove 4a and a spare groove 3a which have a depth from the surface of the GaAs substrate 1 are formed. Then, the whole surface is covered with a second photoresist layer 5; a second opening part 6 which is wider than the opening part 3 for alignment pattern use is formed in the photoresist layer 5. Then, the spare groove 3a is etched additionally; an alignment pattern groove 3b with a depth of D is formed; the photoresist layers 2, 5 are removed by using an exfoliating agent. Thereby, a recognition rate with reference to an automatic alignment pattern can be enhanced in an automatic alignment operation by using a wafer stepper or the like.
申请公布号 JPH0294623(A) 申请公布日期 1990.04.05
申请号 JP19880247992 申请日期 1988.09.30
申请人 NEC CORP 发明人 OGAWA YOSHITO
分类号 H01L21/306;H01L21/027;H01L21/338;H01L29/812 主分类号 H01L21/306
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