发明名称 Integrated circuit module for clock pulse switching - has shift register in circular configuration, and OR-gate in front of each memory element
摘要 The switching integrated circuit contains a shift register ring of register cells (Z1-n). Each cell contains a flip-flop (Dy) coupled via an OR-gate (Gy) either directly, or via a resetting input of a series connected further OR-gate (Oy) to all other register cells, with the exception of that preceding in a shift direction. The feedback results in a H-condition only in one register cell in the shift register ring. A clock pulse monitor (2) starts the shift register ring on starting operation, then is renewed when no register cell transmits a control signal (St), due to failure. The clock pulse switching is carried out with clock pulses of identical phase spacing and frequency to one with an advanced clock pulse phase. USE/ADVANTAGE - Digital signal multiplexers, with high switching velocities and simple use. (8pp Dwg.No.4/6)
申请公布号 DE3913447(A1) 申请公布日期 1990.04.05
申请号 DE19893913447 申请日期 1989.04.24
申请人 SIEMENS AG, 1000 BERLIN UND 8000 MUENCHEN, DE 发明人 SARKOEZI, IMRE, DIPL.-ING., 8000 MUENCHEN, DE
分类号 H03K5/135 主分类号 H03K5/135
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