发明名称 MICROPROCESSOR DEVELOPMENT SUPPORTING DEVICE
摘要 PURPOSE:To easily confirm whether the frequency of a clock signal from an external part is suitable or not in an internal part and to prevent operation defect from being generated by providing a counter for measuring the frequency of the clock signal, which is inputted from the external part, and a comparing part, etc. CONSTITUTION:A counter circuit 1 measures the frequency of a clock signal CLK, which is inputted from the external part, for a prescribed period according to a sampling signal SS and outputs a measured result as a measured frequency FM. Next, a comparing part 4A compares the frequency FM from the circuit 1 and a maximum operating frequency FH stored in a storing part 3A. When the frequency FM is higher than the frequency FH, an error signal ERR1 is outputted. A comparing part 4B compares the frequency FM from the circuit 1 with a minimum operating frequency FL stored in a storing part 3B. When the frequency FM is lower than the frequency FL, an error signal ERR2 is outputted. A gate circuit 5 unites these signals ERR1 and ERR2 and outputs them as an error signal ERR. Thus, the suitable degree of the frequency of the clock signal from the external part can be easily confirmed in the internal part and the operation defect can be prevented from being generated.
申请公布号 JPH0293735(A) 申请公布日期 1990.04.04
申请号 JP19880246031 申请日期 1988.09.29
申请人 NEC CORP 发明人 HIROSE YUKIHIKO
分类号 G06F11/22;G06F9/455 主分类号 G06F11/22
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