摘要 |
<p>A memory card is used on a card write and/or read apparatus which has a data bus with an arbitrary bit width and writes and/or reads a datum to and/or from the memory card. The memory card comprises a data input/output terminal (5, 21, 62a, 62b), a memory part (1, 12, 13, M0-M7) having a data bus with a bit width of at least n bits for coupling to the data bus of the card write and/or read apparatus via the data input/output terminal, an address input terminal (2, 16, 70) for receiving an address signal, a first input terminal (7, 19, 66) for receiving a first chip select signal which selects a first byte, a second input terminal (8, 20, 65) for receiving a second chip select signal which selects a second byte, and a decoder circuit (9, 15, 61) for determining a bit width of the data bus of the memory part to be used for data communication between the card write and/or read apparatus to one of n bits and n/N bits based on the first and second chip select signals and one or a plurality of arbitrary bits of the address signal by supplying control signals to the memory part, where n, N and n/N are positive integers.</p> |
申请人 |
FUJITSU LIMITED;FUJITSU VLSI LIMITED |
发明人 |
MASUYAMA, MASARU;TAKEMAE, YOSHIHIRO;ENDOH, TETSUHIKO;KOMYOJI, HIROSUKE;TANAKA, RYUJI;ITAKURA, KATSUHIKO |