| 摘要 |
The present invention relates to a method of producing a vertical insulated gate field effect transistor. In the present invention a window portion is formed on a polysilicon layer which serves as a gate, by selectively etching the layer so as to leave the central portion intact. Ions of impurities are implanted while using the polysilicon layer having the window portion as a mask. Thereby a phase layer is formed and the ions of impurities are again implanted from the window portion, forming the N+ source region. Since this method is different from a conventional method in that positioning using a special resist mask is unnecessary, the N+ source region is formed by self alignment with a high efficiency and a high accuracy without any positional deviation caused by inaccurate positioning of a mask.
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