发明名称 VIDEO COPY TIMING SIGNAL GENERATING CIRCUIT
摘要 PURPOSE:To avoid shift of the position of timing in sampling a picture signal, by generating a video copy timing based on a horizontal synchronizing signal at the 2nd and succeeding, after a vertial synchronizing signal. CONSTITUTION:A negative synchronizing signal S1 including equivalent pulse inputted from a terminal T1 is integrated at a circuit comprising a resistor R1 and a capacitor C1 and outputted to a counter of a microcomputer and a clear terminal CLR of a flip-flop 12 via a transistor (TR)TR1 and an inverter 11. Further, the synchronizing signal S1 is amplified at a TR2, integrated at a resistor R5 and a capacitor C2 and inputted to a switching signal for a TR3. The output of the TR3 is sequentially inputted to flip-flop circuits 12, 13, 14 and a video copy timing signal based on the 2nd and succeeding horizontal synchronizing signals after the vertical synchronizing signal of the composite sunchronizing signal S1 indlucing equivalent pulses is outputted from an NAND circuit 15.
申请公布号 JPS5890877(A) 申请公布日期 1983.05.30
申请号 JP19810187776 申请日期 1981.11.25
申请人 SHIN NIPPON DENKI KK 发明人 INOUE YUUJI
分类号 H04N5/76;G06F3/153;H04N5/93 主分类号 H04N5/76
代理机构 代理人
主权项
地址