| 摘要 |
PURPOSE:To sample data for signal with an adverse duty at an accurate position by providing a conversion circuit with a detection phase difference which respectively outputs a binary number with code corresponding to the phase of a synchronizing signal in prescribed ranges before and after the phase 0 deg. of the synchronizing signal, and an optional specified binary number in the prescribed ranges around the phase 180 deg. of the synchronizing signal. CONSTITUTION:An input signal B2 is inputted from a signal input terminal 6, and the change point is outputted from an EOR gate 10, whereby the signal is supplied to the load input of a register 3. Reference clocks for a clock input terminal 7 convert into a clock of flip flops 9 and 12, a frequency divider 5 and the register 3. A conversion circuit 13 converts the count value of the frequency divider 5, outputs the prescribed binary number with code irrespective of the phase difference around the phase 180 deg. of the synchronizing signal and outputs the binary number with specified code to the specified range around the phase 0 deg. of the synchronizing signal. An adder 2 adds the output with a result inputted in the register 3 at the change point of the input signal and transmits it to a control circuit 4. Thus, data can be sampled for the signal with adverse duty at the accurate position. |
