发明名称 PSEUDO RANDOM NUMBER GENERATING CIRCUIT
摘要 PURPOSE:To produce in real time a random number series having the high random properties and a long cycle in a simple constitution by combining the pseudo random numbers of different cycles which are read out of a memory circuit based on the output random number value with a pseudo random number of a prescribed cycle via a necessary gate. CONSTITUTION:A pseudo random number of a cycle (n) is produced from an M series generating circuit 11 containing a shift register 1 and an exclusive OR gate 2. At the same time, a pseudo random number generating circuit 12 uses a clock counter 3 as a read control circuit and reads a ROM 4 which stores the random number data having the high random properties and a long cycle n' by means of a physical phenomenon, etc. Thus a pseudo random number of the cycle n' is obtained. These random numbers are processed by the exclu sive OR gates 13a-13e and a pseudo random number of a cycle n'' is produced. In such a simple constitution, it is possible to output in real time a pseudo random number which has the high random properties of the random number of the cycle n' and a long cycle equal to the least common multiple of cycles n and n''. The same effect is also secured with use of an exclusive NOR gate.
申请公布号 JPH0290320(A) 申请公布日期 1990.03.29
申请号 JP19880241053 申请日期 1988.09.28
申请人 HITACHI LTD 发明人 ASHI MASAHIRO;SUGANO TADAYUKI
分类号 G06F7/58 主分类号 G06F7/58
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