| 摘要 |
PURPOSE:To reduce the surface area of a semiconductor chip and realize a semiconductor integrated circuit which is highly integrated by forming a part of electrode wiring and resistance in an epitaxial layer. CONSTITUTION:A P-type semiconductor substrate 1 is equipped with a wiring pattern or a resistance layer pattern and a P<+> type buried region 2 is formed. Then a P-type epitaxial region 3 is formed on a surface comprising the P<+> type buried region 2 and an oxide film 4 is formed on the surface of the P-type epitaxial region 3. Subsequently, opening parts 5a and 5b reaching the P+ type buried layer 2 are provided selectively. Then only the P<+> type buried region 2 is etched selectively to remove its region and the opening parts 5a and 5b as well as walls of a cavity from which the P<+> type buried region is removed are oxidized uniformly to form an oxide film 6. Further, the opening parts 5a and 5b as well as the cavity are filled with a polycrystal silicon layer 7 to diffuse an N-type or P-type impurities and then, electrodes 8a and 8b are formed selectively on the polycrystal silicon layer 7 located on each upper surface at the opening parts 5a and 5b. The polycrystal silicon layer 7 is used as wiring or resistance. |
