| 摘要 |
PURPOSE:To being a PLL circuit into a stable locking state immediately after a receiver reaches the reception mode by starting the operation of a frequency dividing circuit and a phase comparator after the oscillation of a crystal oscillator is started. CONSTITUTION:When a main switch is turned on, a timer 32 is activated, only a signal A goes to a high level, a control switch 3 is closed and only a crystal oscillator 1 is operated. When the oscillation is made stable and a signal B goes to a high level, a control switch 11 is turned on and the PLL circuit is in operation. In the arrival of a call signal, the PLL circuit is in the locking state. A lock detector 23 detects the state to bring a signal C to a high level and to close the control switches 3 and 11. The crystal oscillator 1 taking a time to attain the stable oscillation is operated before the receiver reaches the reception mode and since the entire PLL circuit reaches the stable reception state immediately after the receiver is in the reception mode, a detection time Td is shortened. |
