| 摘要 |
PURPOSE:To increase storage capacitance value by forming a storage capacitor element coupled with one electrode of a selecting transistor of a memory cell via an insulating layer, on the upper layer of a bit line connected with the other electrode of the selecting transistor. CONSTITUTION:On a P-type semiconductor substrate 1, N-type source-drain regions 3, 4 are formed, between which a gate electrode 5 is formed via a gate oxide film 6'. On the source.drain region 4 of an silicon oxide insulating film 7, a contact hole 8 is formed; a polycrystalline silicon film 10 and a tungsten silicide film 11 are deposited on the insulating film 7, so as to come into contact with the region 4; a bit line 9 is formed by etching; an insulating film 12 is deposited on the bit line 9 and an insulating film 7; a contact hole 25 is formed on the source.drain region 3; an electrode layer 14 is formed on the insulating film 12 so as to be connected with the region 3; a nitride film is deposited on the electrode layer 14 whose surface is oxidized and turned into a silicon oxide film, and dielectric 15 is formed: by depositing polycrystalline silicon on the dielectric 15 and the insulating film 12, an electrode layer 18 is formed; an insulating film 19 is formed on the electrode 18; BPSG is deposited thereon, and the surface is flattened. |
