发明名称 MULTI-THRESHOLD VALUE GATE ARRAY DEVICE
摘要 PURPOSE:To facilitate the mounting of an analog circuit by constituting the gate array device of a semiconductor integrated circuit so as to have a MOSFET group with threshold voltages of a plurality of levels. CONSTITUTION:In the chip 10 of an integrated circuit, the following are constituted; input-output circuit group 11 operating as a buffer between the external circuit and the internal circuit of the IC, basic cell groups 12, 18 in which basic cells are arranged, a P-type MOSFET in the part where a gate electrodes 21, 22 and a P-type diffusion region 23 are overlapped, and an N-type MOSFET in the part where the gate electrodes 21, 22 and an N-type diffusion region 24 are overlapped. Both gate electrodes of MOSFET's 31, 32 constituting an inverter circuit are connected with an input terminal 33, and both drain electrodes are connected with an output terminal 34. A signal inputted to the input terminal 33 is outputted to the output terminal 34 after the polarity is inverted.
申请公布号 JPH0286166(A) 申请公布日期 1990.03.27
申请号 JP19880237562 申请日期 1988.09.22
申请人 SEIKO EPSON CORP 发明人 HASHIMOTO MASAMI
分类号 H01L21/822;H01L21/82;H01L27/04;H01L27/118 主分类号 H01L21/822
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