发明名称 TELEMETRY PROCESSOR
摘要 PURPOSE:To attain the reduction of the number of signal lines, the light weight of equipment, and cost reduction and to simplify wiring even when a design is changed by providing a multiplexer part, a packet generating part, and a block selection signal generating part. CONSTITUTION:The multiplexer part 4 collects plural binary telemetry data signals from loaded equipment 2, and generates plural signals of eight bits corresponding to a block selection signal from the block selection signal generating part 5, and sends them to the packet generating part 7 sequentially via eight signal lines, The generating part 7 synthesizes a packet signal by synthesizing an input signal from the part 4, the block selection signal from the part 5, and an interface identification code from an interface identification code generating part 6, and furthermore, converts the signal to a serial signal, and sends it to a data editing device 3 via one signal line. Thus, by making the signal into the block signal and the packet signal, it is possible to attain the reduction of the number of signal lines, the light weight of the equipment, and the cost reduction, and also, to simplify the wiring due to the change of the design.
申请公布号 JPH0284826(A) 申请公布日期 1990.03.26
申请号 JP19880237079 申请日期 1988.09.20
申请人 NEC CORP 发明人 HIBARA HIROKI
分类号 B64G1/22;B64G1/24;G08C15/00;H04B7/15;H04B7/185;H04Q9/00 主分类号 B64G1/22
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