| 摘要 |
PURPOSE:To prevent occurrence of a steady-state phase error by continuing the integration operation based on a phase difference data before interruption if an input to a processing unit is interrupted so as to suppress the effect of the frequency fluctuation of an oscillator. CONSTITUTION:If an input is interrupted, a processing unit does not fetch a phase difference phi nor generate a proportion control data by a proportion circuit (PRO) and fixes an output of the circuit PRO to a value just before the input interruption. On the other hand, an integration circuit (INT) applies the integration of the phase difference phi just before the input interruption similarly to the usual processing to generate an integration control data correcting the fluctuation of an oscillated frequency caused by aging of a digital control oscillator (DCXO). The fixed proportion control data and the integration control data generated by the INT are added by an adder (ADD) and the result is inputted to the DCXO, then the self-running processing is applied while correcting the frequency at an output OUT even if the input IN is interrupted. Thus, when the input IN is recovered and the frequency synchronization is taken by the normal processing, no steady-state phase error is caused. |
