发明名称 Method to reduce silicon area for via formation
摘要 A method for forming substrate contacts in an integrated circuit structure uses a layer of conductive material, preferably polycrystalline silicon, applied to the surface of the semiconductor structure to make electrical contact with exposed portions of the substrate. The polycrystalline silicon layer is then coated with a nitride layer. A via mask which is opaque over the region where a contact will be formed produces a photoresist stud smaller that the original via mask. The photoresist stud is used to pattern the nitride to remain only over the contact region. Following this, the polycrystalline silicon is oxidized except at the nitride mask, forming a bird's beak beneath edges of the nitride. The resulting contact is smaller than the photolithographic limit of the via mask and thus allows for smaller space allocated for contact regions and smaller total structure.
申请公布号 US4910168(A) 申请公布日期 1990.03.20
申请号 US19880191305 申请日期 1988.05.06
申请人 MOS ELECTRONICS CORPORATION 发明人 TSAI, NAN-HSIUNG
分类号 H01L21/285;H01L21/768 主分类号 H01L21/285
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