发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To facilitate the integration of a memory device in a direction of a word line so as to improve it in reliability by a method wherein the integration is managed with a single bit line and a single drain contact hole. CONSTITUTION:A bit line 7a is connected to a drain diffusion layer 2 through the intermediary of a drain contact hole 10, selective transistors 20 are arranged in two rows to be connected with the drain diffusion layer 2, where the selective transistors 20 are composed of enhancement type transistors 11 and depletion type transistors 12 optionally connected with each other in series. And, source lines 22 are arranged crossing the bit lines 7a at a right angle, selective transistors 21 are arranged in a row to be connected to the source lines 22, two or more cell transistors 14 provided with a floating gate 4a and a control gate 5 are arranged as being connected with each other in series so as to connect two rows of the selective transistors 20 with a row of the selective transistors 21. Therefore, the integration can be executed in a direction of a word line 15 and a non-volatile semiconductor memory device of this design can be improved in reliability.</p>
申请公布号 JPH0274069(A) 申请公布日期 1990.03.14
申请号 JP19880226919 申请日期 1988.09.09
申请人 FUJITSU LTD 发明人 KANAZAWA KENICHI
分类号 H01L21/8247;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/8247
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