发明名称 Voltage regulator having staggered pole-zero compensation network
摘要 The feedback control loop of the common-emitter output transistor stage of a low dropout voltage regulator imcorporates a staggered pole-zero network, which effectively introduces an incremental reduction, or rolloff, in gain, and an accompanying reduction in phase shift with increase in frequency, so that, at the unity gain point of the transfer characteristic, there is still substantial phase margin, thus preventing the circuit from being driven into oscillation. The RC load pole location can vary widely and stability is maintained. The network is configured as a staggered resistor-capacitor network comprised of plural resistor-capacitor circuits coupled in cascade between the output of the feedback error amplifier and the input of a buffer amplifier the output of which drives the base of the output stage transistor in order to offset loading effects of the transistor base on the staggered pole-zero network.
申请公布号 US4908566(A) 申请公布日期 1990.03.13
申请号 US19890313435 申请日期 1989.02.22
申请人 HARRIS CORPORATION 发明人 TESCH, BRUCE J.
分类号 G05F1/56 主分类号 G05F1/56
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