| 摘要 |
<p>The circuit having horizontal and vertical address base registers and a memory whose size is certain times larger than a screen memory for normal displaying includes a video memory for storing the picture data of CPU and for transmitting the data according to the access signal from a CRT controller (2), a horizontal base address buffer (4) connected to a data bus (B) of the CPU for buffering the new standard horizontal address signal according to the change of picture, an adder (5) transmitting new column address signal applied to the memory (9), a horizontal base address buffer (6) for transmitting a new low address signal, and a multiplexer (8) transmitting address signal for designating certain picture in the memory (9).</p> |
