| 摘要 |
PURPOSE:To freely set the capacity of parallel data to be stored and to apply a device on a various kinds of processors by using a main memory also used for the housing of software in the storage of the parallel data, providing input and output buffer registers on input and output sides, and prohibiting the storage in and readout from the main memory corresponding to the presence/absence of effective parallel data. CONSTITUTION:An output holding register 103, the output buffer registers 208 and 209 to hold and send out the parallel data output sequentially, and the main memory 202 also used for the housing of the software to store the parallel data output are provided. Furthermore, the input buffer registers 205 and 206 to hold and send out read out parallel data sequentially, and an input holding register 104 to convert the parallel data output to serial data and to supply it to the input of a scan path are provided. The storage on the main memory 202 is prohibited when no effective parallel data exists in the output buffer registers 208 and 209, and also, the readout from the main memory 202 is prohibited when the effective parallel data exists in the input buffer registers 205 and 206. In such a manner, it is possible to sufficiently store the data. |
