发明名称 PACKET PREFERENTIAL CONTROLLER
摘要 PURPOSE:To average numbers of waiting times as a whole by measuring respective numbers of waiting times when output line numbers of each packet conflict with each other and outputting the data about the input having the largest number of waiting times. CONSTITUTION:Output line numbers outputted from the register 21 of each input buffer means 101-104 are inputted to the 1st comparing means 11 where whether the same output line number exists or not is checked. When one of output line numbers of inputs 2-4 is consistent with the output line number of an input 1, the inputs are inputted to the AND gate 25 of a priority measuring means 121. Outputs of priority measuring means 121-124 are inputted to the 2nd comparing means 13 by which each counter value is compared with another and the input having the smallest number of waiting times is kept waiting. Therefore, the number of waiting times of each input port is not leaned to one side, but averaged when a output line number conflicts (congests) with each other. As a result, the packet transferring efficiency can be improved.
申请公布号 JPH0269048(A) 申请公布日期 1990.03.08
申请号 JP19880220374 申请日期 1988.09.05
申请人 FUJITSU LTD 发明人 WATANABE TOSHIAKI;SOEJIMA TETSUO;SHINOMIYA TOMOHIRO;EZAKI YUTAKA
分类号 H04L29/06;H04L12/70 主分类号 H04L29/06
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